/**
 ******************************************************************************
 * @file    cmt.h
 * @author  hyseim software Team
 * @date    18-Mar-2024
 * @brief   This file provides all the headers of the cmt functions.
 ******************************************************************************
 * @attention
 *
 * Copyright (c) 2020 Hyseim. Co., Ltd.
 * All rights reserved.
 *
 * This software is licensed under terms that can be found in the LICENSE file
 * in the root directory of this software component.
 * If no LICENSE file comes with this software, it is provided AS-IS.
 *
 ******************************************************************************
 */

/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __CMT_H__
#define __CMT_H__

#ifdef __cplusplus
extern "C" {
#endif

/* Includes ------------------------------------------------------------------*/
#include "chip_define.h"
#include "utils.h"

/* ================================================================================ */
/* ================            Compare Match Timer (CMT)           ================ */
/* ================================================================================ */
typedef struct
{
    struct{
        __IO uint32_t LOADCOUNT;            /*!< Timer N Load Count Register,              Address offset: 0x000, 0x014, 0x028, 0x03C */
        __I  uint32_t CURRENTVALUE;         /*!< Current value of Timer N,                 Address offset: 0x004, 0x018, 0x02C, 0x040 */
        __IO uint32_t CONTROL;              /*!< Timer N Control Register,                 Address offset: 0x008, 0x01C, 0x030, 0x044 */
        __IO uint32_t EOI;                  /*!< Timer N End-of-Interrupt Register,        Address offset: 0x00C, 0x020, 0x034, 0x048 */
        __I  uint32_t INTSTATUS;            /*!< Timer N Interrupt Status Register,        Address offset: 0x010, 0x024, 0x038, 0x04C */
    } Timer[4];
         uint32_t RESERVED0[20];
    __I  uint32_t TIMERS_INTSTATUS;         /*!< Timers Interrupt Status Register,         Address offset: 0x0A0 */
    __IO uint32_t TIMERS_EOI;               /*!< Timers End-of-Interrupt Register,         Address offset: 0x0A4 */
    __I  uint32_t TIMERS_RAW_INTSTATUS;     /*!< Timers Raw Interrupt Status Register,     Address offset: 0x0A8 */
} CMT_t;

#define CMT0          ((CMT_t *) CMT0_BASE)
#define CMT1          ((CMT_t *) CMT1_BASE)
/* ================================================================================ */
/* ================            Compare Match Timer (CMT)           ================ */
/* ================================================================================ */
/********************************  Bit definition for CMT_TIMER_CONTROL register  ********************************/
#define CMT_TIMER_CONTROL_EN              (0x1U << 0)           /*!< Timer enable bit for Timer N */
#define CMT_TIMER_CONTROL_MODE            (0x1U << 1)           /*!< Timer mode for Timer N */
#define CMT_TIMER_CONTROL_INT_MASK        (0x1U << 2)           /*!< Timer interrupt mask for Timer N */

/********************************  Bit definition for CMT_TIMER_INTSTATUS register  ********************************/
#define CMT_TIMER_CONTROL_INTSTATUS       (0x1U << 0)           /*!< Contains the interrupt status for Timer N */

/** @addtogroup IM110GW_CMT_Driver
  * @{
  */

/** @addtogroup CMT
  * @{
  */

/* Exported types ------------------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/

/** @defgroup CMT_Exported_Constants
  * @{
  */

/** @defgroup CMT_Timer_NUM
  * @{
  */
#define CMT_Timer1                          ((uint8_t)0x00)
#define CMT_Timer2                          ((uint8_t)0x01)
#define CMT_Timer3                          ((uint8_t)0x02)
#define CMT_Timer4                          ((uint8_t)0x03)
/**
  * @}
  */


/** @defgroup CMT_CountMode
  * @{
  */
#define CMT_Count_UserDefine_Mode           CMT_TIMER_CONTROL_MODE
#define CMT_Count_FreeRunning_Mode          (0x0U << 1)
/**
  * @}
  */


/** @defgroup CMT_InterruptGeneration
  * @{
  */
#define CMT_Interrupt_Enable                (0x0 << 2)
#define CMT_Interrupt_Disable               CMT_TIMER_CONTROL_INT_MASK
/**
  * @}
  */

/**
  * @}
  */

/* Exported macro ------------------------------------------------------------*/
/* Exported functions --------------------------------------------------------*/

void CMT_Timer_Enable(CMT_t* CMTx, uint8_t CMT_TimerNum);
void CMT_Timer_Disable(CMT_t* CMTx, uint8_t CMT_TimerNum);
void CMT_Timer_SetCounterLoad(CMT_t* CMTx, uint8_t CMT_TimerNum, uint32_t LoadValue);
void CMT_Timer_Init(CMT_t* CMTx, uint8_t CMT_TimerNum, uint8_t CountMode, uint8_t IntEnable, uint32_t LoadValue);
uint32_t CMT_Timer_GetCounter(CMT_t* CMTx, uint8_t CMT_TimerNum);
FlagStatus_t CMT_Timer_GetINTStatus(CMT_t* CMTx, uint8_t CMT_TimerNum);
void CMT_Timer_ClearFlag(CMT_t* CMTx, uint8_t CMT_TimerNum);

/**
  * @}
  */

/**
  * @}
  */

#ifdef __cplusplus
}
#endif

#endif
